Semiconductor devices such as for example the bipolar transistor have long been state of the art and are used in many different ways, for example in analog and digital integrated circuits. The component parts of a bipolar transistor include an emitter as a charge carrier source, a collector as a charge carrier drain (charge carrier outlet) and a base as the control device for controlling the flow of current between the emitter and the collector.
The emitter and the collector nowadays frequently consist of silicon (chemical symbol: Si) of a given conductivity type whereas the base consists of silicon of the opposite conductivity type. There are two different conductivity types in semiconductor materials such as for example silicon. Semiconductor materials with electron as charge carriers are referred to as n-conducting, while those with holes as charge carriers are referred to as p-conducting. In pure silicon, both kinds of charge carriers are present in equal concentrations, and in that case this is referred to as intrinsic silicon. If the charge carrier concentration is increased by the introduction of foreign atoms, referred to as doping substances, that is referred to as doping. n-Doping occurs if the doping substance introduced is an n-doping substance (donor), that is to say one which leads to an increase in the concentration of electrons as charge carriers. The material then becomes n-conducting. For example phosphorus (P), arsenic (As) and antimony (Sb) are used as the n-doping substance. On the other hand, p-doping exists if the doping substance introduced is a p-doping substance (acceptor), that is to say one which leads to an increase in the concentration of holes as charge carriers. The semiconductor material then becomes p-conducting. For example boron (B), indium (In) and gallium (Ga) are used as p-doping substances. If the increase in concentration of electrons/holes after the doping operation is very great or very slight, that affords a highly doped semiconductor material (n+/p+-doping) and a weakly doped semiconductor material (n−/p−-doping) respectively.
Three processes are available for doping a semiconductor material: ion implantation and diffusion, in each case after producing the layer to be doped, and introduction of the doping substance in situ, that is to say when depositing the layer to be doped. In addition, a distinction is drawn as to whether the doping substance occupies an interlattice position, that is to say is present in interstitial form, or assumes a lattice position in the layer, that is to say it is substitutionally incorporated.
Accordingly, the above-described bipolar transistor can be for example an npn-transistor. The designation npn-transistor means that the collector and the emitter are n-doped, whereas the base is p-doped. Instead of being in the form of an npn-transistor, it is also possible for it to be in the form of a pnp-transistor. In that case the dopings are reversed in comparison with the npn-transistor.
In the case of bipolar transistors a distinction is drawn between horizontal bipolar transistors, also referred to hereinafter as lateral bipolar transistors, in which the collector, the base and the emitter are arranged in horizontally mutually juxtaposed relationship, and vertical bipolar transistors in which the the collector, the base and the emitter are arranged in mutually superposed relationship. Frequently bipolar transistors are produced using silicon technology (Si-bipolar transistors). The conductivity of vertical Si-bipolar transistors (referred to English as: bipolar junction transistor BJT) in the high-speed range is markedly improved by the use of an epitaxially produced base layer. Further power reserves were achieved in particular with the integration of an epitaxially produced layer sequence comprising silicon (Si)/silicon-germanium alloy (SiGe)/silicon (Si/SiGe/Si layer sequence) into bipolar or BiCMOS processes. The doping for the base of the bipolar transistor is introduced into the SiGe-layer. This is referred to as an SiGe heterobipolar transistor, referred for brevity as an SiGe-HBT. The band gap in the SiGe-layer, which is smaller in comparison with Si, leads to increased injection of minority charge carriers into the base, in comparison with conventional Si-bipolar transistors. That physical effect but also the precise deposit and doping of the epitaxial layers on an atomic length scale, which can already be implemented on an industrial scale, is utilized to reduce both the transit times of the charge carriers in the base and also the base resistance. Those properties afford higher transit frequencies fT and maximum oscillation frequencies fmax and lower high-frequency (HF) noise. An additional increase in conductivity in the high-speed range requires the reduction of the parasitic components, in particular external base resistance, base-collector and collector-substrate capacitance, collector resistance and also the charge carrier transit time in the base-collector space-charge region.
In order to expand the width of use of bipolar transistors in circuits, integration on one chip of transistors with different collector-emitter breakdown voltages (abbreviation in the English literature BVCEO) is advantageous. Various BVCEOs cause a different power performance for the transistors in the high-speed range. The solutions known from the literature, see for example A. Schüppen, M. Tortschanoff, J. Berntgen, P. Maier, D. Zerrweck, H. von der Ropp, J. Tolonics and K. Burger: “The proliferation of Silicon Germanium”, Cork, Ireland, ESSDERC 2000, pages 88 ff, Sep. 11 through 13, 2000, use for that purpose selectively implanted collector (SIC) regions which produce the connection to a buried, highly conductive layer (referred to in English as the buried layer). The breakdown voltage is adjusted by way of the spacing of the buried layer from the base layer, which at the same time defines the extent of a low-doped collector layer (referred to English as the low-doped collector LDC) and the doping substance concentration of the SIC regions. Different demands are made on the LDC width if transistors with differing SIC-doping and consequently differing BVCEO are to be optimized in respect of best possible power performance in the high-speed range. That solution inevitably involves a compromise to the detriment of the high-speed properties of the transistors with a lower breakdown voltage. The reason for this is that a certain minimum width of the LDC is necessary for providing the greatest desired breakdown voltage and that for transistors with a lower breakdown voltage, that results in an additional damaging contribution to collector resistance, which leads to a reduction in power in the high-speed range. That disadvantage can be only partially compensated by a suitable configuration in respect of the SIC doping, because in that respect limits are imposed in respect of the profile steepness, conductivity and freedom from defects, which do not exist in relation to a buried layer, in particular an epitaxially buried layer.
There are also solutions in which the depth of the buried layer is not established by means of an epitaxial layer but in which the depth of the doping profile is established by the energy of the ions in an implantation operation (epitaxy-free buried layer). Because of the opposing demands in terms of the implantation parameters which on the one hand aim for a sufficiently great LDC width and which on the other hand seek to achieve a profile gradient which is as steep as possible for the buried layer, the known structures based on an epitaxy-free buried layer, for a greater BVCEO, that is to say about >6V, did not achieve the power parameters in the high-speed range, as are known for an epitaxially buried layer.
Besides the requirement for a higher level of performance, in particular the cost factor causes modifications to the transistor structure or process technology, as set forth for example in WO 00/14806. That publication proposes a transistor structure which avoids the otherwise usual features of a deep trench and an epitaxially buried, high-doped sub-collector layer, without in that respect having to tolerate impairments worth mentioning in the high-frequency properties due to increased collector resistances or collector-substrate capacitances. That arrangement however does not disclose for example any results which at the same time show BVCEO values of greater than 6V and very good high-frequency properties.